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Failure Analysis Technician

Salary undisclosed

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Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Responsibilities & Skills

Job Summary:

The Engineering Technician will be assigned to the Reliability Department to support internal and external customer requests for failure analysis on our FPGA products, and to help Lattice meet failure analysis cycle time targets and other commitments.

Detailed Job Description

The responsibilities and duties of the failure analysis technician include the following:

  • Prepare sample specimens for failure analysis.
  • Perform sample inspection using optical microscope, x-ray, acoustic microscope, and scanning electron microscope.
  • Verify electrical failures using bench test setups.
  • Perform destructive FA methodologies such as decapsulation, mechanical polishing and cross-section.
  • Provide periodic updates on the progress of the analysis.
  • Generate analysis reports.
  • Support failure analysis laboratory projects and initiatives.
  • Comply and adhere to laboratory safety standards and requirements.
  • Perform daily housekeeping activities.

Required Skills

  • Graduate of technical or engineering course.
  • Minimum of 2 (two) years’ experience in semiconductor and/or failure analysis field.
  • Experience in performing mechanical cross-section and parallel lapping of IC packages.
  • Chemical laboratory experience performing IC package decapsulation is desired.
  • Experience in using the scanning electron microscope is an advantage.
  • Must have basic knowledge and experience working with software-based tools. At the minimum, the candidate must have knowledge on MS Office applications.
  • Must be able to read and understand operating manuals and work instructions.
  • Must be able to clearly and concisely document analysis results.
  • Must be able to meet deadlines, as well as manage and prioritize own tasks.
  • Must be able to effectively collaborate with peers and customers.
  • Must be able to communicate, verbally or in written form, technical issues to supervising engineers.
  • Flexibility on work shift is highly desirable.

Benefits

Competitive benefits package including:

  • Medical (HMO), dental, vision effective on date of hire
  • Employee Stock Purchase Plan, Well-being Programs, Tuition Reimbursement and more